EIA-96 SMD Resistor Codes and SpinAsm AND: Difference between pages

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(Created page with "==AND== {| class="wikitable" |+ !Mnemonic !Operation !Instruction coding |- |AND |ACC & MASK |MMMMMMMMMMMMMMMMMMMMMMMM000001110 |} ======Description====== AND will perform a bit wise "and" of the current ACC and the 24­bit MASK specified within the instruction word. The instruction might be used to load a constant into ACC provided ACC contains $FFFFFF or to clear ACC if MASK equals $000000. (see also the pseudo opcode section) {| class="wikitable" |+ !Name !Width !Ent...")
 
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==AND==
{| class="wikitable"
{| class="wikitable"
|+
|+
!Code
!Mnemonic
!Ohms
!Operation
!Code
!Instruction coding
!Ohms
!Code
!Ohms
!Code
!Ohms
!Code
!Ohms
!Code
!Ohms
|-
|-
!01
|AND
|100
|ACC & MASK
!17
|MMMMMMMMMMMMMMMMMMMMMMMM000001110
|147
!33
|215
!49
|316
!65
|464
!81
|681
|-
!02
|102
!18
|150
!34
|221
!50
|324
!66
|475
!82
|698
|-
!03
|105
!19
|154
!35
|226
!51
|332
!67
|487
!83
|715
|-
!04
|107
!20
|158
!36
|232
!52
|340
!68
|499
!84
|732
|-
!05
|110
!21
|162
!37
|237
!53
|348
!69
|511
!85
|750
|-
!06
|113
!22
|165
!38
|243
!54
|357
!70
|523
!86
|768
|-
!07
|115
!23
|169
!39
|249
!55
|365
!71
|536
!87
|787
|-
!08
|118
!24
|174
!40
|255
!56
|374
!72
|549
!88
|806
|-
!09
|121
!25
|178
!41
|261
!57
|383
!73
|562
!89
|825
|-
!10
|124
!26
|182
!42
|267
!58
|392
!74
|576
!90
|845
|-
!11
|127
!27
|187
!43
|274
!59
|402
!75
|590
!91
|866
|-
!12
|130
!28
|191
!44
|280
!60
|412
!76
|604
!92
|887
|-
!13
|133
!29
|196
!45
|287
!61
|422
!77
|619
!93
|909
|-
!14
|137
!30
|200
!46
|294
!62
|432
!78
|634
!94
|931
|-
!15
|140
!31
|205
!47
|301
!63
|442
!79
|649
!95
|953
|-
!16
|143
!21
|210
!48
|309
!64
|453
!80
|665
!96
|976
|}
|}
======Description======
AND will perform a bit wise "and" of the current ACC and the 24­bit MASK specified within the instruction word. The instruction might be used to load a constant into ACC provided ACC contains $FFFFFF or to clear ACC if MASK equals $000000. (see also the pseudo opcode section)
{| class="wikitable"
{| class="wikitable"
|+
|+
!Letter
!Name
!Multiplier
!Width
|-
!Entry formats, range
|'''R or Y'''
|Multiply value by 0.01
|-
|'''S or X'''
|Multiply value by 0.1
|-
|'''A'''
|No operation
|-
|'''B'''
|Multiply value x 10
|-
|'''C'''
|Multiply value x 100
|-
|'''D'''
|Multiply value x 1000
|-
|'''E'''
|Multiply value x 10,000
|-
|-
|'''F'''
|M
|Multiply value x 100,000
|24 Bit
|Binary
Hex ($000000 - $FFFFFF)
Symbolic
|}
|}
======Syntax======
AND M
======Coding Example======
<syntaxhighlight line="1">
Off  EQU  1.0                  ;
                                ;
; Halve way rectifier ­­­­­­­­
sof  0,0                        ; Clear ACC
rdax ADCL,1.0                  ; Read from left ADC channel
sof  1.0,Off                    ; Subtract offset
sof  1.0,Off                    ; Add offset
</syntaxhighlight>

Revision as of 20:20, 6 January 2023

AND

Mnemonic Operation Instruction coding
AND ACC & MASK MMMMMMMMMMMMMMMMMMMMMMMM000001110
Description

AND will perform a bit wise "and" of the current ACC and the 24­bit MASK specified within the instruction word. The instruction might be used to load a constant into ACC provided ACC contains $FFFFFF or to clear ACC if MASK equals $000000. (see also the pseudo opcode section)

Name Width Entry formats, range
M 24 Bit Binary

Hex ($000000 - $FFFFFF) Symbolic

Syntax

AND M

Coding Example
Off  EQU  1.0                   ; 
                                ; 
; Halve way rectifier ­­­­­­­­
sof  0,0                        ; Clear ACC 
rdax ADCL,1.0                   ; Read from left ADC channel
sof  1.0,Off                    ; Subtract offset 
sof  1.0,Off                    ; Add offset
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